On-chip communication system modeling approach for reability analysis focusing on functional failures

The advances in the process technology have shrunk the feature size which has paved the road to higher orders of integration in the recent years. Year by year, the number of components integrated into a single chip is growing. Resulted in larger number of interconnects, the communication between the...

詳細記述

書誌詳細

第一著者:	Forooshani, Arash Abtahi
フォーマット:	学位論文
言語:	英語
出版事項:	2012
主題:	Systems on a chip Computer architecture Interconnects (Integrated circuit technology)
オンライン･アクセス:	http://psasir.upm.edu.my/id/eprint/59772/1/FK%202012%2095IR.pdf