Timing performance enhance for routing channel in 28NM FPGA chip

Dalam reka bentuk FPGA, saluran laluan bertindak sebagai penyambung antara kawasan dalaman dan luaran. Dengan pertumbuhan get kiraan yang semakin pantas serta rumit dalam proses nod 28nm, keperluan masa daripada reka bentuk ini adalah sukar untuk mencapai perubahan untuk semua PVT. Penganggaran masa...

Full description

Bibliographic Details
Main Author:	Kin , Si Kee
Format:	Thesis
Language:	English
Published:	2013
Subjects:	T Technology TK Electrical Engineering. Electronics. Nuclear Engineering TK5105 Computer networks and Data transmission systems
Online Access:	http://eprints.usm.my/32972/
Abstract	Abstract here

Similar Items

Prevention Mechanism Against Denial Of Service Attack On Duplicate Address Detection Process In Ipv6 Link-Local Networks
by: Ibrahim Al-Ani, Ahmed Khallel
Published: (2020)

Anomaly-Based Detection Approach To Detect The Flash Crowd Attack During The Flash Event
by: Al-Saleem, Samer Abdulsada Mutlag
Published: (2017)

QYPS HPS Interconnect verification methodology for SOC FPGA
by: Loh , Tat Jen
Published: (2013)

Technique Of Pvt Analysis On Sd Controller Timing Validation For 28nm Soc Fpga
by: Yusni, Nur Amalina Aiza
Published: (2015)

Design Of Fpga Address Register In 28nm Process Technology Based On Standard Cell Based Approach
by: Chew , Ming Choo
Published: (2013)

Hybrid dynamic phase alignment scheme to improve sampling resolution for 1.25 gHz source synchronous interface
by: Lim , Kok Chean
Published: (2013)

Design method to transmit and receive source synchronous signals using source asynchronous
by: Ramachandran, Nathan
Published: (2013)

High Frequency Signaling Analysis Of Inter-Chip Package Routing For Multi-Chip Package
by: Yong, Khang Choong
Published: (2013)

Evaluation Of 28nm 10 Bit Adc Using Ramp And Sinusoidal Histogram Methodologies
by: Wan Ismail, Wan Mohd Fahmi
Published: (2015)

An Efficient Energy Aware Adaptive System-On-Chip Architecture For Real-Time Video Analytics
by: Ahmed, Hisham Ahmed Ali
Published: (2016)

Optimized transconductance designs to enhance the linearity performance of RF front-end receiver circuits in 130 NM CMOS technology / Nandini Vitee
by: Nandini , Vitee
Published: (2020)

Enhancement Of Methodology And Definition For Serial Protocol Electrical Specification Compatibility For Non-Compliant Fpga
by: Tan , Shwu Fei
Published: (2014)

A generation of transmitter signal for 16 PSK STBC memo on FPGA based polarizone testbed / Mohd Naim Ab Kassim
by: Ab Kassim, Mohd Naim
Published: (2014)

Study Of Basic 22nm Transistor Technology On Sequential Circuit Using Primetime
by: Nik Hassan, Nik Azman
Published: (2013)

Rekabentuk Penuras Digit Fir Termusnah Untuk Aplikasi Sonar Menggunakan Teknologi FPGA
by: Mohd Zain, Dalmataksiah
Published: (2005)

Return Loss Enhancement Of Radial Line Slot Array Antenna Using Closed Ring Resonator Structure At 28 Ghz
by: Kamaruddin., Rabiatul Adawiyah Azian
Published: (2018)

Development of techniques for in-situ monitoring stress-induced degradation and potential solutions for FPGA / Anuar Jaafar
by: Anuar , Jaafar
Published: (2022)

New d-piso architecture for dynamic symbol size digital baseband modulation implementation in FPGA
by: Ilyas, Mohammad Arif
Published: (2020)

FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation
by: Ahmad, Nabihah @ Nornabihah
Published: (2005)

Electrostatic Discharge For Sysyem On Chip Applications
by: Yuet, Cheryl She Siew
Published: (2017)

Analysis of FPGA design methods using AN 8 BIT ALU
by: Mohd Zin, Rosnah
Published: (2005)

Enhancement Of Methodology And Definition For Serial Protocol Electrical Specification Compatibility For Non-Compliant Fpga
by: Tan , Shwu Fei
Published: (2014)

Multistage Power Amplifier In 180nm Cmos Technology With Integrated Passive Linearizer For IEEE 802.15 Application
by: Gunasegaran, Premmilaah
Published: (2018)

Power Management Controller By Using Intel Max 10 Fpga
by: Ooi , Kheng Jin
Published: (2017)

Quality factor improvement of on-chip meander line resistor in high frequency operation / Wong Goon Weng
by: Wong , Goon Weng
Published: (2022)

An Optical Set-Up For Inspecting Edge Chipping Defects Of Dws Solar Wafer
by: Lim, Thai Li
Published: (2019)

Implementation Of SVM For Cascaded H-Bridge Multilevel Inverters Utilizing FPGA
by: Al-Jewari, Maher Abd Ibrahim
Published: (2019)

Design and Implementation of I2C BUS Protocol on Xilinx FPGA
by: l Pradeep Kumar, Meenal
Published: (2017)

Hardware Implementation Of Artificial Neural Network On FPGA For Sulfate-Reducing Bacteria
by: Tan, Earn Tzeh
Published: (2014)

Enhanced PAPR reduction and channel estimation techniques in multi-carrier wireless communication system
by: Ali Kareem, Nahar
Published: (2016)

Performance analysis of reactive routing protocol based on less-flooding AODV and route stability aware in mobile ad-hoc networks
by: Roswan Ismail
Published: (2019)

Fpga-Based Accelerator for The Generation of Pseudo-Amino Acid Composition
by: Ching, Chee Chow
Published: (2015)

Modeling Of Vertical Side Chip Interconnect Technology For 3-Dimensional Packaging
by: Tan , Ai Heong
Published: (2015)

FPGA Implementation Of A Multihop Wavelength Division Multiplexing (WDM) Ring Router Algorithm
by: Noordin, Nurul Hazlina
Published: (2004)

An improved algorithm for channel allocation on direct sequence spread spectrum
by: Handrizal, M
Published: (2011)

A study on channel coding for 5G / Xu Wei
by: Xu , Wei
Published: (2019)

Block diagonalization precoding for multiuser-MIMO downlink channel / Nur Asniffah Mat Zain
by: Mat Zain, Nur Asniffah
Published: (2015)

A multicriteria aware optimal routing approach for enhancing quality of service in device to device communication / Valmik Tilwari
by: Valmik , Tilwari
Published: (2020)

Effect of epoxy nozzle separation on die attach adhesion at chip / substrate interface
by: Yeo, Kian Hong
Published: (2016)

Mold filling parameters in resin transfer molding for flip chip semiconductor packages
by: Lim, Ming Siong
Published: (2017)