The design of calibration circuit for analog-to-digital converter (ADC).

Dua jenis (Jenis 1 dan Jenis 2) litar tentukuran untuk ADC saluran maklumat telah direka bentuk menggunakan kod Verilog-A yang boleh didapati daripada arkib ahdlib dari alat simulasi perisian Cadence Virtuoso. Kod yang diguna pakai telah diubahsuai bagi memenuhi litar tentukuran yang dicadangkan. Du...

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Détails bibliographiques
Auteur principal:	S. Mohideen Ali , Mohammad Ariff
Format:	Thèse
Langue:	anglais
Publié:	2016
Sujets:	TK Electrical Engineering. Electronics. Nuclear Engineering TK1001-1841 Production of electric energy or power. Powerplants. Central stations TK7800-8360 Electronics
Accès en ligne:	http://eprints.usm.my/33000/
Abstract	Abstract here

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