Digital Phase Locked-Loop With Wide Tuning Range And Dynamic Phase Shift
For decades, Phase Lock Loop (PLL) has been widely used in numerous systems, such as telecommunications and digital design, where it plays significant role in improving overall system timing. Moving forward, with the latest revolution towards System-on-chip technology (SOC), the need of PLL in the f...
| मुख्य लेखक: | Rosle, Anafaezalena |
|---|---|
| स्वरूप: | थीसिस |
| भाषा: | अंग्रेज़ी |
| प्रकाशित: |
2014
|
| विषय: | |
| ऑनलाइन पहुंच: | http://eprints.usm.my/40885/ |
| Abstract | Abstract here |
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समान संसाधन
-
Simulation studies of 30 MHz phase-locked loop coherent receiver
द्वारा: Abdul Wahab, Fauzi
प्रकाशित: (2005) -
Hybrid Synthesizer Based On Phase-Lock Loop (Pll) Driven Direct Digital Synthesizer (Dds)
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प्रकाशित: (2017) -
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द्वारा: Abdullah, Muhammad Zulkarnain
प्रकाशित: (2018) -
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द्वारा: Iqbal, Syed Javaid
प्रकाशित: (2001) -
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द्वारा: Afifi, Amir Effendy Muhammad
प्रकाशित: (2011)
