Tan , A. H. (2015). Modeling Of Vertical Side Chip Interconnect Technology For 3-Dimensional Packaging.
Style de citation Chicago (17e éd.)Tan , Ai Heong. Modeling Of Vertical Side Chip Interconnect Technology For 3-Dimensional Packaging. 2015.
Style de citation MLA (9e éd.)Tan , Ai Heong. Modeling Of Vertical Side Chip Interconnect Technology For 3-Dimensional Packaging. 2015.
Attention : ces citations peuvent ne pas être correctes à 100%.