Tan , A. H. (2015). Modeling Of Vertical Side Chip Interconnect Technology For 3-Dimensional Packaging.
Chicagoスタイル(17版)引用形式Tan , Ai Heong. Modeling Of Vertical Side Chip Interconnect Technology For 3-Dimensional Packaging. 2015.
MLA(9版)引用形式Tan , Ai Heong. Modeling Of Vertical Side Chip Interconnect Technology For 3-Dimensional Packaging. 2015.
警告: この引用は必ずしも正確ではありません.