Modeling Of Vertical Side Chip Interconnect Technology For 3-Dimensional Packaging

In this miniaturization era, previously, shrinking the technology node was used in order to maintain and improve the electrical performance of a device. However, this method is getting difficult due to the limitation of Silicon (Si) atomic size of the material in designing the integrated circuit (IC...

Full description

Bibliographic Details
Main Author:	Tan , Ai Heong
Format:	Thesis
Language:	English
Published:	2015
Subjects:	TK1-9971 Electrical engineering. Electronics. Nuclear engineering
Online Access:	http://eprints.usm.my/40931/
Abstract	Abstract here

Similar Items

High Frequency Signaling Analysis Of Inter-Chip Package Routing For Multi-Chip Package
by: Yong, Khang Choong
Published: (2013)

Analysis Of Plastic Encapsulation Process In 3D IC Package With Through-Silicon Via (Tsv) Technology
by: Ong, Ern Seang
Published: (2013)

Electrostatic Discharge For Sysyem On Chip Applications
by: Yuet, Cheryl She Siew
Published: (2017)

Clock Distribution Network Building Algorithm For Multiple Ips In System On A Chip
by: Tan , Tze Liang
Published: (2017)

Routing and theoretical properties of optimised degree six 3- modified chordal rings for large interconnection network topologies
by: Lim, Stephen Erm-Chien
Published: (2017)

Iterative And Single-Step Solutions Of Two Dimensional Time-Domain Inverse Scattering Problem Featuring Ultra Wide Band Sensors
by: Binajjaj, Saeed Ali Saeed
Published: (2010)

Impact Of Demand-Side Management On Generating Systems Adequacy Assessment
by: HUSSEIN, JUMMA JABIR
Published: (2019)

Rtl Implementation Of Secure Hash Algorithm 3 (Sha-3) Towards Smaller Area
by: Lim , Yen Ruen
Published: (2017)

Antenna and frequency diversity improvement in mimo wimax technology.
by: Kadhim, Mohammed Aboud
Published: (2011)

Study Of Basic 22nm Transistor Technology On Sequential Circuit Using Primetime
by: Nik Hassan, Nik Azman
Published: (2013)

An Optical Set-Up For Inspecting Edge Chipping Defects Of Dws Solar Wafer
by: Lim, Thai Li
Published: (2019)

Study Of The Relationship Between Delta Delay And Adjacent Parallel Wire Length In 45 Nanometer Process Technology
by: Mohamed, Shamsul Anuar
Published: (2014)

Multistage Power Amplifier In 180nm Cmos Technology With Integrated Passive Linearizer For IEEE 802.15 Application
by: Gunasegaran, Premmilaah
Published: (2018)

Design Of A Microcontroller-Based Converter For 3-Phase Brushless DC Motor Drives
by: Mohd Nayan, Norkharziana
Published: (2009)

An Efficient Energy Aware Adaptive System-On-Chip Architecture For Real-Time Video Analytics
by: Ahmed, Hisham Ahmed Ali
Published: (2016)

Design And Development Of A 3.6 GHZ Dielectric Resonator Oscillator With Wide Tuning Sensitivity
by: Afifi, Amir Effendy Muhammad
Published: (2011)

Design And Simulation Of Cmos-Based Bandgap Reference Voltage With Compensation Circuit Using 0.18 Μm Process Technology
by: Chan, Mun kit
Published: (2017)

A 1.8v 10-Bit 100ms/S Fully Differential Pipelined Adc In Cmos 0.18um Process Technology
by: Khoo , Boon Hee
Published: (2017)

A 0.8 – 2.4 Gbps Driver With Adjustable De-Emphasis Scheme For Ddr3 Memory Interface
by: Lim, Zong Zheng
Published: (2014)

Keberkesanan Prinsip Isyarat Dalam Aplikasi Multimedia (Prolin3k) Terhadap Kemahiran Membaca Dan Menulis Serta Persepsi Motivasi Murid
by: Md Napeah, Ro’azeah
Published: (2020)

Electrical Insulation Characteristics Of P Epdm Blends With Aln, Al2o3 And Rganoclay Nanofillers
by: Mansor, Noor Syazwani
Published: (2015)

Development Of Test Platform Of Fpga Interconnect To Capture Marginal Open Defect
by: Mohamed Sultan, Fahmy Hafriz
Published: (2015)

Prelayout Design Of Configurable Serdes For High Speed Signaling In Multidie Interconnect
by: Chiew , Chong Giap
Published: (2016)

A Discrete Distributed Power Amplifier For VHF To UHF.
by: Tan, Teik Siew
Published: (2008)

Enhancement Of Methodology And Definition For Serial Protocol Electrical Specification Compatibility For Non-Compliant Fpga
by: Tan , Shwu Fei
Published: (2014)

Detection Of Misplaced And Missing Regions In Image Using Neural Network
by: Tan , Jin Siang
Published: (2017)

Initialization Methods For Conventional Fuzzy C-Means And Its Application Towards Colour Image Segmentation
by: Tan , Khang Siang
Published: (2011)

Development Of A Low Cost And Low Loss Single Phase Grid Tie Inverter For Photovoltaic Application
by: Tan , Kheng Kwang
Published: (2012)

Band-Limited Phase-Only Correlation (Blpoc) Using Fpga For Finger Vein Recognition System
by: Tan, Chee Wei
Published: (2013)

Hardware Implementation Of Artificial Neural Network On FPGA For Sulfate-Reducing Bacteria
by: Tan, Earn Tzeh
Published: (2014)

Thermal Investigations Of Flip Chip Microelectronic Package With Non-Uniform Power Distribution [TK7874. G614 2004 f rb] [Microfiche 7607].
by: Goh, Teck Joo
Published: (2004)

Timing performance enhance for routing channel in 28NM FPGA chip
by: Kin , Si Kee
Published: (2013)

Preserving Mak Yong for aesthetic experience in Intangible Cultural Heritage through digital technology
by: Naimah Musa@Zakaria
Published: (2023)

Microprocessor Solder Bump Bridging Defects Screening Strategy In Manufacturing Test Flow
by: Loo , Kean Ann
Published: (2017)

136-941 Mhz Lna Design For Software Defined Radio
by: Osman, Anwar Faizd
Published: (2014)

Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations
by: Tan, Kin Hang
Published: (2017)

Normative Fish Swarm Algorithm For Global Optimization With Applications
by: Tan, Weng Hooi
Published: (2019)

QYPS HPS Interconnect verification methodology for SOC FPGA
by: Loh , Tat Jen
Published: (2013)

Maximum Power Point Tracking Using Llc Resonant Converter For Pv Power Systems
by: Tan, Adrian Soon Theam
Published: (2016)

Design Of 10 Ghz Negative Resistance Dielectric Resonator Oscillator
by: Mohammad Zaki, Syazana Basyirah
Published: (2015)