New Cdc Design Tool For Analog Layout Workflow

The placement and routing on CMOS analog layout design had always been a time consuming and irritating process due to large amount of transistor devices placements, arrangements and a lot of critical nets routing constraint. Manual efforts to complete analog layout design took few weeks to months’ t...

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Bibliographic Details
Main Author:	Ng , Hin Mung
Format:	Thesis
Language:	English
Published:	2015
Subjects:	TK7800-8360 Electronics
Online Access:	http://eprints.usm.my/40966/
Abstract	Abstract here

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