Reusable Automated Agent For Universal Verification Methodology System Testbench
Pre-silicon verification process is an important cog in an application specific integrated chip design cycle. It is considered one of the biggest bottle-neck in modern day design projects. Thus, verification efficiency and productivity has gained a lot of attention lately and will be the driving fac...
| المؤلف الرئيسي: | |
|---|---|
| التنسيق: | أطروحة |
| اللغة: | الإنجليزية |
| منشور في: |
2015
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| الموضوعات: | |
| الوصول للمادة أونلاين: | http://eprints.usm.my/40975/ |
| Abstract | Abstract here |