Chiew , C. G. (2016). Prelayout Design Of Configurable Serdes For High Speed Signaling In Multidie Interconnect.
शिकागो शैली (17वां संस्करण) प्रशस्ति पत्रChiew , Chong Giap. Prelayout Design Of Configurable Serdes For High Speed Signaling In Multidie Interconnect. 2016.
एमएलए (9वां संस्करण) प्रशस्ति पत्रChiew , Chong Giap. Prelayout Design Of Configurable Serdes For High Speed Signaling In Multidie Interconnect. 2016.
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