Prelayout Design Of Configurable Serdes For High Speed Signaling In Multidie Interconnect

As the process technology advances, transistor size shrinks and more intellectual properties (IPs) are integrated onto chip. In order to accommodate the current complex functionalities as well as improving the performance of design, integrated circuit (IC) architecture has encouraged the integration...

Description complète

Détails bibliographiques
Auteur principal:	Chiew , Chong Giap
Format:	Thèse
Langue:	anglais
Publié:	2016
Sujets:	TK7800-8360 Electronics
Accès en ligne:	http://eprints.usm.my/41312/

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