Prelayout Design Of Configurable Serdes For High Speed Signaling In Multidie Interconnect

As the process technology advances, transistor size shrinks and more intellectual properties (IPs) are integrated onto chip. In order to accommodate the current complex functionalities as well as improving the performance of design, integrated circuit (IC) architecture has encouraged the integration...

وصف كامل

التفاصيل البيبلوغرافية
المؤلف الرئيسي:	Chiew , Chong Giap
التنسيق:	أطروحة
اللغة:	الإنجليزية
منشور في:	2016
الموضوعات:	TK7800-8360 Electronics
الوصول للمادة أونلاين:	http://eprints.usm.my/41312/

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