The Study Of Temperature Analysis On Fusible Metal Bonding Application

• Main Author: Gnanasegaran, Yogeswaran
• Format: Thesis
• Language: English; English
• Published: 2020
• Subjects: T Technology (General); TS Manufactures
• Online Access: http://eprints.utem.edu.my/id/eprint/25496/; https://plh.utem.edu.my/cgi-bin/koha/opac-detail.pl?biblionumber=119739

High frequency packages become very important due to the rapid growth of wireless communication system. They require compactness, low cost and high performances ever at frequency up to 60 GHz. Flip-chip device assembly using organic substrates at very high frequency has become a cost competitive packaging method in semiconductor industries. This thesis discusses the influence of temperature on copper pillar solder joints contact to the surface of the substrate after reflow respect to staging time by using flip chip device. Samples of the flip chip devices will be bonded under selected temperature and then will undergo cross section of sample to determine the failure analysis of flip chip bonded after reflow process .Therefore, different temperature and staging time in bonding process can cause the bonding mechanism of flip chip copper pillar to have less adhesion and copper pillar crack at the neck of the pillar. Besides that, the nature of solder contributes to poor solder wetting and low thermal conductivity. For an example, the behavior of Sn-based solder in term of thermal conductivity and solder wetting characteristic. The test results shows that, the copper pillar solder can be productively sustain the solder joint of the thermal fatigue life cycle and the formation of intermetallic compound (IMC). The basic requirements of the joining material and the process will be discuss in this study. In future, experimental research on the performance of solder joint with different type of temperature is required. In summary, improvement towards the flip chip die bonding process which by controlling the optimum temperature and staging time would overall be a driving force towards the development of similar packages with more demanding requirements towards the existing flip chip packages.