A computer aided design software module for clock tree synthesis in very large scale integration design

With the evolution of Very Large Scale Integration (VLSI) fabrication technology, circuit size has grown and line width has decreased. In effect, the transistor transit time and the time to drive signal lines across chips have also decreased. Thus, interconnections have become the dominating fact...

وصف كامل

التفاصيل البيبلوغرافية
المؤلف الرئيسي:	Chew, Eik Wee
التنسيق:	أطروحة
اللغة:	الإنجليزية
منشور في:	2008
الموضوعات:	TK Electrical engineering. Electronics Nuclear engineering
الوصول للمادة أونلاين:	http://eprints.utm.my/17986/1/ChewEikWeeMFKE2008.pdf

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