Verilog design of input/output processor with built-in-self-test

This project has a final goal of designing an I/O processor (IOP) with embedded built-in-self-test (BIST) capability. The IOP core design was originally design in VHDL modeling has been migrated to Verilog HDL modeling in this project. BIST is one of the most popular test technique used nowadays. Th...

पूर्ण विवरण

ग्रंथसूची विवरण
मुख्य लेखक:	Goh, Keng Hoo
स्वरूप:	थीसिस
भाषा:	अंग्रेज़ी
प्रकाशित:	2007
विषय:	TK Electrical engineering. Electronics Nuclear engineering
ऑनलाइन पहुंच:	http://eprints.utm.my/5959/1/GohKengHooMFKE2007.pdf

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