Simulation studies of 30 MHz phase-locked loop coherent receiver
Phase-Locked Loop or in short PLL is a vital part in electronics system mainly in communication system in getting back the transmitted signal. As a whole, it is basically a closed loop frequency control system where its function is based on the phase sensitive detection of phase difference bet...
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| Format: | Thesis |
| Language: | English English English |
| Published: |
2005
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| Online Access: | http://eprints.uthm.edu.my/7645/ |
| Abstract | Abstract here |
| _version_ | 1855520710680641536 |
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| author | Abdul Wahab, Fauzi |
| author_facet | Abdul Wahab, Fauzi |
| author_sort | Abdul Wahab, Fauzi |
| description | Phase-Locked Loop or in short PLL is a vital part in electronics system
mainly in communication system in getting back the transmitted signal. As a whole,
it is basically a closed loop frequency control system where its function is based on
the phase sensitive detection of phase difference between the input signal
(transmitted signal) and the output of the controlled oscillation. Although the system
had been around since 1930's, implemented by the French Engineer, H. De
Bellescise, but still, until today further development is in progress in achieving better
response and performance in retrieving and synchronising transmitted signals. The
purpose of this project is to familiarise in designing and constructing a 30 MHz
Phase-Locked Loop Coherent Receiver by computer simulation, taking account the
requirements for each building block of a PLL system, the stability of the system and
the response of the system. To achieve this, the process includes simple and direct
calculations, and circuit simulations observation. Results are represented in graphs
and are analysed. |
| format | Thesis |
| id | uthm-7645 |
| institution | Universiti Tun Hussein Onn Malaysia |
| language | English English English |
| publishDate | 2005 |
| record_format | EPrints |
| record_pdf | Restricted |
| spelling | uthm-76452022-09-08T02:17:03Z http://eprints.uthm.edu.my/7645/ Simulation studies of 30 MHz phase-locked loop coherent receiver Abdul Wahab, Fauzi TK Electrical engineering. Electronics Nuclear engineering TK7800-8360 Electronics Phase-Locked Loop or in short PLL is a vital part in electronics system mainly in communication system in getting back the transmitted signal. As a whole, it is basically a closed loop frequency control system where its function is based on the phase sensitive detection of phase difference between the input signal (transmitted signal) and the output of the controlled oscillation. Although the system had been around since 1930's, implemented by the French Engineer, H. De Bellescise, but still, until today further development is in progress in achieving better response and performance in retrieving and synchronising transmitted signals. The purpose of this project is to familiarise in designing and constructing a 30 MHz Phase-Locked Loop Coherent Receiver by computer simulation, taking account the requirements for each building block of a PLL system, the stability of the system and the response of the system. To achieve this, the process includes simple and direct calculations, and circuit simulations observation. Results are represented in graphs and are analysed. 2005-04 Thesis NonPeerReviewed text en http://eprints.uthm.edu.my/7645/1/24p%20FAUZI%20ABDUL%20WAHAB.pdf text en http://eprints.uthm.edu.my/7645/2/FAUZI%20ABDUL%20WAHAB%20COPYRIGHT%20DECLARATION.pdf text en http://eprints.uthm.edu.my/7645/3/FAUZI%20ABDUL%20WAHAB%20WATERMARK.pdf Abdul Wahab, Fauzi (2005) Simulation studies of 30 MHz phase-locked loop coherent receiver. Masters thesis, Kolej Universiti Teknologi Tun Hussein Onn. |
| spellingShingle | TK Electrical engineering. Electronics Nuclear engineering TK7800-8360 Electronics Abdul Wahab, Fauzi Simulation studies of 30 MHz phase-locked loop coherent receiver |
| thesis_level | Master |
| title | Simulation studies of 30 MHz phase-locked loop coherent receiver |
| title_full | Simulation studies of 30 MHz phase-locked loop coherent receiver |
| title_fullStr | Simulation studies of 30 MHz phase-locked loop coherent receiver |
| title_full_unstemmed | Simulation studies of 30 MHz phase-locked loop coherent receiver |
| title_short | Simulation studies of 30 MHz phase-locked loop coherent receiver |
| title_sort | simulation studies of 30 mhz phase locked loop coherent receiver |
| topic | TK Electrical engineering. Electronics Nuclear engineering TK7800-8360 Electronics |
| url | http://eprints.uthm.edu.my/7645/ |
| work_keys_str_mv | AT abdulwahabfauzi simulationstudiesof30mhzphaselockedloopcoherentreceiver |