Modeling and analysis of cylindrical gate-all around silicon nanowire FET including BOHM quantum potential model

According to Moores’s Law, the number of transistors per square inch on integrated circuits are doubled every year. Now, the transistors size has been scaled down to 15nm. The smaller the transistors size gives more space for transistors to be added in system on chip (SoC) thus will provide a lot of...

書誌詳細
第一著者:	Abd. Razak, Muhammad A’tif
フォーマット:	学位論文
言語:	英語
出版事項:	2018
主題:	TK Electrical engineering. Electronics Nuclear engineering
オンライン･アクセス:	http://eprints.utm.my/78859/1/MuhammadAtifAbdRazakMFKE2018.pdf

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