Modeling and analysis of cylindrical gate-all around silicon nanowire FET including BOHM quantum potential model

According to Moores’s Law, the number of transistors per square inch on integrated circuits are doubled every year. Now, the transistors size has been scaled down to 15nm. The smaller the transistors size gives more space for transistors to be added in system on chip (SoC) thus will provide a lot of...

Description complète

Détails bibliographiques
Auteur principal: Abd. Razak, Muhammad A’tif
Format: Thèse
Langue:anglais
Publié: 2018
Sujets:
Accès en ligne:http://eprints.utm.my/78859/1/MuhammadAtifAbdRazakMFKE2018.pdf

Documents similaires