Finfet circuit modelling using hspice
Also available in printed version
| المؤلف الرئيسي: | |
|---|---|
| مؤلفون آخرون: | |
| التنسيق: | Bachelor thesis |
| اللغة: | الإنجليزية |
| منشور في: |
Universiti Teknologi Malaysia
2025
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| الموضوعات: | |
| الوصول للمادة أونلاين: | https://utmik.utm.my/handle/123456789/58636 |
| Abstract | Abstract here |
| _version_ | 1854975103506317312 |
|---|---|
| author | Nor Hafizah Roslan |
| author2 | Tan, Michael Loong Peng, supervisor |
| author_facet | Tan, Michael Loong Peng, supervisor Nor Hafizah Roslan |
| author_sort | Nor Hafizah Roslan |
| description | Also available in printed version |
| format | Bachelor thesis |
| id | utm-123456789-58636 |
| institution | Universiti Teknologi Malaysia |
| language | English |
| publishDate | 2025 |
| publisher | Universiti Teknologi Malaysia |
| record_format | dspace |
| record_pdf | Abstract |
| spelling | utm-123456789-586362025-08-21T10:26:16Z Finfet circuit modelling using hspice Nor Hafizah Roslan Tan, Michael Loong Peng, supervisor Electrical engineering Also available in printed version Fin-Field Effect Transistors (FinFETs) are one of the challenges of new device structure for CMOS at nanoscale design. To enable high speed, low power consumption and low cost the minimum feature size for CMOS is decrease year by year. FinFET are promising less count of transistor used since the device are made up using two transistors for back and front gate hence make the FinFET have four terminal which are drain, source, back gate and front gate. The unique structure and electronic properties of FinFET such as superior ability to control leakage and minimizing short channel effect while delivering strong a strong drive current. The PTM website provided the development for FinFET model given by Arizona State University. By using and following the parameter from PTM card model, this project present the analysis for two types of FinFET which are 32nm and 45nm. The modifications of both type models of devices are then implement using HSPICE software. To obtain the characteristic of the device performance, the waveform was generated using CosmosScope. The characteristic for current drain, voltage drain input and output voltage across back and front transistor are obtained and the comparison are made for both 32nm and 45nm FinFET. It has been shown that 32nm FinFET have less current drain in cut off region, less voltage across drain to source and less size of device. The 32nm FinFET model is proved to have better performance compare to 45nm FinFET zulaihi UTM 79 p. Project Paper (Sarjana Muda Kejuruteraan (Elektrik - Elektronik)) - Universiti Teknologi Malaysia, 2012 2025-03-17T04:58:22Z 2025-03-17T04:58:22Z 2012 Bachelor thesis https://utmik.utm.my/handle/123456789/58636 valet-20170316-145819 vital:97063 ENG Closed Access UTM Complete Unpublished application/pdf Universiti Teknologi Malaysia |
| spellingShingle | Electrical engineering Nor Hafizah Roslan Finfet circuit modelling using hspice |
| thesis_level | Other |
| title | Finfet circuit modelling using hspice |
| title_full | Finfet circuit modelling using hspice |
| title_fullStr | Finfet circuit modelling using hspice |
| title_full_unstemmed | Finfet circuit modelling using hspice |
| title_short | Finfet circuit modelling using hspice |
| title_sort | finfet circuit modelling using hspice |
| topic | Electrical engineering |
| url | https://utmik.utm.my/handle/123456789/58636 |
| work_keys_str_mv | AT norhafizahroslan finfetcircuitmodellingusinghspice |