Software Modification in a Fault Analysis Tool for Critical Path Debugging
Microprocessor units caught with speed failure are becoming more and more eminent as the fabrication process shrinks according to Moore’s Law. Failure Analysis (FA) engineers confront the problem using Critical Path Debug method utilizing special IC (Integrated Circuit) test system capable of tes...
| 第一著者: | |
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| フォーマット: | 学位論文 |
| 言語: | 英語 英語 |
| 出版事項: |
2009
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| オンライン･アクセス: | http://psasir.upm.edu.my/id/eprint/7360/1/FK_2009_50a.pdf |