Design And Characterization Of Silicon Nanowire Transistor And Logic Nanowire Inverter Circuits
The most important limitation in planer MOSFETs is current leakage between the source and the drain at the off-state (IOFF), which presents a critical problem in securing circuit reliability. To mitigate this problem, there are new types of transistors with a 3D structure, including silicon na...
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| フォーマット: | 学位論文 |
| 言語: | 英語 |
| 出版事項: |
2013
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| 主題: | |
| オンライン･アクセス: | http://eprints.usm.my/45223/ |