APA引文

Tan Tze Sin, T. S. (2017). Accelerated Verilog Simulator Using Application Specific Microprocessor.

Chicago Style (17th ed.) Citation

Tan Tze Sin, Tze Sin. Accelerated Verilog Simulator Using Application Specific Microprocessor. 2017.

MLA引文

Tan Tze Sin, Tze Sin. Accelerated Verilog Simulator Using Application Specific Microprocessor. 2017.

警告：這些引文格式不一定是100％准確.