The Development Of A Capacitive Parasitic Element Extraction And Estimation Methodology To Improve Design Cycle
In the chip industry today, the key goals of a chip development organization is to develop and market chips within a short timeframe to gain foothold on market share. Despite this requirement, chip design and manufacturing are increasing in level of complexity due to advancement in process tec...
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| フォーマット: | 学位論文 |
| 言語: | 英語 |
| 出版事項: |
2013
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| 主題: | |
| オンライン･アクセス: | http://eprints.usm.my/44002/ |